Release Notes for Icarus Verilog 0.8
The quick link for the impatient: <ftp://ftp.icarus.com/pub/eda/verilog/v0.8>.
This release represents for Icarus Verilog continuing progress towards
standards compliance guided by practical need. In other words, I and my
co-workers use it in our daily work and we need it to be compatible
with other tools that we use. The choices that led to this release are
also consequences of common requests from users or would-be users, and
occasionally in the interests of friendly vendors.
What is Icarus Verilog 0.8
The current release is a considerable improvement over the previous
stable release. It includes 20 months of fixes and language coverage
improvements. Obviously, the complete list of changes is far to vast to
list explicitly. For a complete history of changes, see the release
notes for individual snapshots between the 0.7 and 0.8 releases. But here is a brief list of highlights:
This is necessarily a vague list. If you want to know if your
particular feature has been added between 0.7 and 0.8, the best I can
say is to try it and see.
- Support for advanced standard data types such as real,
- Lots more language support in general,
- Kernel of an extensible, interactive debugger is new,
- More complete support for user supplied system functions and
tasks, including PLI system functions with various return value types,
- Better standards compliance for core system tasks and functions in general, including some Verilog 2001 file I/O support, and
- Performance improvements in general.
Getting Icarus Verilog 0.8
The Icarus Verilog home page is <http://www.icarus.com/eda/verilog/index.html>. The home page has links to various versions, including the main 0.8 directory here: <ftp://ftp.icarus.com/pub/eda/verilog/v0.8>.
The FTP repository includes the main source distribution, and
precompiled packages for a variety of different systems. New binaries
are added as packages are contributed by volunteer porters. Absense of
binaries for your system does not mean your system type is not
supported. More likely, it means it is a system that I do not have in
my office, and no one has contributed a pre-made package. In that case,
compile from the source.
Known Limitations of Icarus Verilog 0.8
Icarus Verilog 0.8 is not perfect. It works reliably for many
engineers, but there are limitations, including but not limited to:
- Specify blocks and specify timing paths are not supported. The specify block is parsed, but ignored.
- Some advanced Verilog-2001 features, sush as generate statements, variable part selects, and arrays of wires, are not supported.
- No SDF back annotation.
- PLI 1 support is limited.
- The usual raft of bugs.
Where It's Going
Early on, I harbored plans to move towards System Verilog. However,
that standard seems to have turned into a dumping ground for every
feature under the sun, so those plans have been dropped. Still, subject
to personal priorities, I plan to continue developing Icarus Verilog
for the forseeable future. There is still plenty of Verilog-2001
standards compliance work to do, and look out for new features to track
emerging Verilog standards.
This page is Copyright 2004 Stephen Williams
$Id: Release_Notes_for_Icarus_Verilog_0_8.html,v 1.1 2004/10/14 00:50:01 steve Exp $