Welcome to the home page for Icarus Verilog. This is the source for your favorite free implementation of Verilog!

Quick Links:

What is Icarus Verilog?

Icarus Verilog is a Verilog simulation and synthesis tool. It operates as a compiler, compiling source code writen in Verilog (IEEE-1364) into some target format. For batch simulation, the compiler can generate an intermediate form called vvp assembly. This intermediate form is executed by the ``vvp'' command. For synthesis, the compiler generates netlists in the desired format.

The compiler proper is intended to parse and elaborate design descriptions written to the IEEE standard IEEE Std 1364-2005. This is a fairly large and complex standard, so it will take some time to fill all the dark alleys of the standard, but that's the goal.

Icarus Verilog is a work in progress, and since the language standard is not standing still either, it probably always will be. That is as it should be. However, I will make stable releases from time to time, and will endeavor to not retract any features that appear in these stable releases. The quick links above will show the current stable release.

The main porting target is Linux, although it works well on many similar operating systems. Various people have contributed precompiled binaries of stable releases for a variety of targets. These releases are ported by volunteers, so what binaries are available depends on who takes the time to do the packaging. Icarus Verilog has been ported to That Other Operating System, as a command line tool, and there are installers for users without compilers. You can compile it entirely with free tools, too, although there are precompiled binaries of stable releases.

Where is Icarus Verilog?

NOTE: This is a quick summary of where to get Icarus Verilog. for more complete download and install instructions, look -->here.

The Current release is available in source and a variety of binary forms in the FTP directory <ftp://icarus.com/pub/eda/verilog/v0.9/ >. Updates to the stable release may be made from time to time to fix problems, but there should be no compatibility issues within this version series. This will continue to be maintained until rendered obsolete by a new stable release.

Development snapshots are made fairly often, and made available in the FTP directory <ftp://icarus.com/pub/eda/verilog/snapshots>. The files are gzip compressed tar files that contain the source and makefiles. These snapshots follow development progress, and, although the latest features are included in this source, compatibility from snapshot to snapshot is not guaranteed.

And finally, the current "git" repository is available for read-only access via anonymous git cloning. This allows for those who which to track my progress and contribute with patches timely access to the most bleeding edge copy of the source. Access the git repository of Icarus Verilog with the commands:

git clone git://icarus.com/~steve-icarus/verilog

(Note: The older CVS repository is obsolete.)

From here, you can use normal git commmands to update your source to the very latest copy of the source. See the Installation Guide for details on how to access and compile the git repository.

A Test Suite?

There is also a test suite available. The test suite is also accessible as the ivtest SourceForget.net project, available here: <http://sourceforge.net/projects/ivtest >. The SourceForge pages describe how to get at the test suite proper via git. Since the test suite is simply an ongoing accumulation of tests, there are not typically any releases, per se. Only the git source.

Who is Icarus Verilog?

The main compiler is written by (and copyright) Stephen Williams. That's me. In fact, I'm still working on it, and will continue to work on it for the forseeable future. I'm a software engineer specializing in device drivers and embedded systems, although I have some limited hardware design experience. Even so, I am a software engineer writing software for hardware designers, so expect the occasional communications glitch:-)

There is also a cast of characters who have contributed patches, tests, and various bits to the project. I'll be adding a credits page as soon as I catch my breath, although the source distributions do in general name names.

The mailing lists for Icarus Verilog are hosted by sourceforge.net, so go there for mailing list archives and instructions on joining; but it is often discussed in the gEDA-dev mailing list as well. See the gEDA home page for information about that project, and information about how to join the mailing list. While you are browsing the gEDA web site, notice all the other nifty EDA related tools that are there. While Icarus Verilog is not literally part of the gEDA project, we cooperate and try to support each other. Icarus Verilog users are often gEDA users as well.

Technical Support

Support for Icarus Verilog is self serve. The main documentation site for Icarus Verilog is the Iverilog Wikia.com wiki, and that is the first place to start for help. (There is also a legacy FAQ here.) If the documentation and the FAQ fail you, then try asking your question on the mailing lists. I and other contributers read the list regularly, and I encourage users to subscribe to the list, so in that forum you have a chance of getting a human being to help you.

If you think you have found a bug, then see the "Bugs " page. This tells you how and where to report bugs with the software. I try to promptly look to bug reports, but this is free software that I work on when (if!) I have time so please don't get impatient.

Paid Technical Support

If you want paid support for significant effort, contact me directly. I have a day job that is not likely to change, but I am receptive to taking on limited paid contracts on the side. The sort of tasks I'd consider include support for new/missing language features, compiler and infrastructure improvements, accellerated bug fixes, etc. The sort of tasks I'd not consider include telephone/on-site support, proprietary extensions (or other attempts to "close" the Icarus Verilog source) or any work that cannot be shared under GPL or compatible licenses after completion.

Note that borderline cases (i.e. proprietary plug-ins) may work out better then you think. For example, although proprietary code generators are your responsibility, compiler improvements in support of your plug-in are tasks I would consider, so long as that paid work can go into the GPL'ed release. If you have questions, ask. Contact me at steve at icarus dot com.

Resources, Etc.

See the Icarus Verilog documentation wiki at <http://iverilog.wikia.com>.

Icarus Verilog cooperates with the gEDA project <http://www.gpleda.org> along with other significant EDA development projects. Be sure to visit gEDA for other of your EDA needs.

Tons of open source EDA resources, as well as news on open source EDA development, can be found at the Open Collector web site. It's interesting browsing.

Linux Journal printed a feature article about Icarus Verilog in their February 2001 issue. For the first year it was available in print only, but now the article is now available on line at <http://www.linuxjournal.com/article.php?sid=4428 >. The July 2002 issue includes two articles about Icarus Verilog, one of which is available here <http://www.linuxjournal.com/article.php?sid=6001 >.

The Icarus image seen as the background, and as the logo for Icarus Verilog, was contributed by Charles F. Wilson in order to represent Icarus Verilog.

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